Sugestions for VooDoo based projects

[Blazkowicz]

and the standard 4x1 (of 2x2x1, should I say? ) would be always equal or better than 2x2 !?!

[Ragnarok72]

Originally posted by Blazkowicz

and the standard 4x1 (of 2x2x1, should I say? ) would be always equal or better than 2x2 !?!

Well, out of curiousity, what kind of work would we be looking at here to make it possible?  Are there absolutely no loopholes in the SLI architecture in the card that would allow ANY data/communication between the two VSA-100 cores directly?

I suppose it would be like (starting from the chip farthest from the VGA port connector in either the V5 6000 or the V5 5500's case), you'd do a data passthrough from chip to chip to chip, each core recieving the data and using its TMU's to multitexture the objects before passing it on to the next.....

Again, I'm no hardware technician, so I'd consider this a "shot in the dark" theory....but surely the designed-for-SLI archetiture of the V5 could be "hijacked" for such a nefarious operation?

[BFG3dfx]

Hello, im new here, i would like to see the extra memory on a v5500, im willing to buy the memory and supply a v5500 to test this on, ive never talked to you hank but if this works out i would pay you a fair amount to do the work, if thats alright with you, i have a v5500 that o/c's quite well, (over 200)which i would send to you, let me know if any of this may suit you if you get a chance for i know of no other that might do the work, ty BFG3dfx

[BFG3dfx]

mycableguy inc part# PAPTXAGP-64
the riser itself is just a slot expansion, meaning you don't have to worry about the AGP aperture level, just the bit, this item is a 64 bit, so if it's a newer card, it's what you need. This will convert 1.5 to 3.3 as needed, with VIO, so if you have a 3.3 card, on a 1.5 board, then it will work----- this was sent to me after i request an adapter for 1.5v to 3.3v agp, not sure what to make of it, its 120.00 for the adapter, id hate to order it and have it not work, anyone have an idea about this?

[Nightbird]

This is the link for people
http://www.mycableshop.ca/sku/PAPTXAGP-64.htm

[perer]

@ Hank you sad a Voodoo2 Cooler on the memory, I have been looking for a big long but low heatsink for a while. And just for curiosity, I know you worked on the voodoo5 but have you also worked on the voodoo2 or maybe 1??? I don't know if it is already implemented somewhere but I think that we would need HSR, especially for voodoo2 boards, because of that damn pci slot ( I wished I had a mobo with 2 66mhz slots).

[perer]

It may be MAD but how abour a dedicated T and L chip combined with a voodoo2-3-4-5. They have done it with a voodoo2 so they can do it with a voodoo3/4/5. But you would need a T_l chip, I don´t know but maybe you could use the Elan chip from videologic or for a voodoo3 a chip from Realvision. But a new chip like this needs a board. So that needs to be made. Yes and not to forget drivers!!!!!!!!!
As I sad this is a MAD idea, and probably will never be realized.

[amp_man]

Originally posted by perer

It may be MAD but how abour a dedicated T and L chip combined with a voodoo2-3-4-5. They have done it with a voodoo2 so they can do it with a voodoo3/4/5. But you would need a T_l chip, I don´t know but maybe you could use the Elan chip from videologic or for a voodoo3 a chip from Realvision. But a new chip like this needs a board. So that needs to be made. Yes and not to forget drivers!!!!!!!!!
As I sad this is a MAD idea, and probably will never be realized.

Yes, but that requires hours/days/weeks/months of labor to implement and then money to manufacture. Unless you're Bill Gates, it ain't gonna happen. (Stating Bill Gates not for his petty programming skills but his cash flowing out the wazoo, just to clarify).

[perer]

Yes just like me you think it won't happen. We can only dream .
Or if every 3dfx fan puts like about 20 dollar in the pot. We could maybe make it ( but that is again not very likely to happen).

But what we can do is to get HSR to work with other games than quake3, unreal and so on. I saw the results with  HSR on and of, and I was impressed!!!!!!!!!1
If maybe HSR worked almost perfect and every Voodoo could use it.
I wonder how fast my voodoo2 SLI would be in quake3 then.

[amp_man]

Hmm, I still have to be skeptical....even at $20 USD apiece, lets assume there are 100 3dfx nuts willing to chip in, that's a whole...$2,000. That has to cover the re-developement of drivers, which would include the HW TnL unit, the design of the PCB, and all that other crap that I really have no time or patience to explain. Lecram is majoring in this, maybe he can offer a little better perspective, but I don't see an investment of $2,000 doing much (especially when it comes to convincing a company to build this for an extrememly limited market, Glide users and current 3dfx junkies).

[perer]

Well ehm.. it was more of a idea.
And yes we wil need more than 100 nuts we need a 100.000 of m.
And I don't think we ever gonna do this, it is better to take a fast CPU.

[del42sa]

Originally posted by Ragnarok72

I just had a crazy idea.

I don't know if this would be more of a driver-design or hardware-design issue, or if this was already suggested, but while a V5 is running in Single Chip mode, would it be possible to use the TMU pipelines from the other chips during multitexture operations?

I.e., a V5 5500 in Single Chip mode uses the 2nd chip's TMU to gain an effective 4-texture-per-pass operation?  Now I'm no hardware technician like Hank is, but I would assume that since the card is a multiple-chip design, that there would be at least some underlying circuitry already on the PCB that would allow for some sort of communication between the chips, which could perhaps be utilized for this task without the need for hardware modification.  But since I don't know if there is, that would be where you guys come in.

Of course, on the driver end we'd probably have to re-code it to treat the card as a 1 VSA-100 with an additional off-die TMU unit, when it comes to Single-Chip Mode....I might be mistaken, but didn't the original Voodoo1 have that type of architecture, with an off-die TMU?

I think Quantum 3D used this idea in AAlchemy, they calling it "Performance Trilinear"

The Enable Performance Trilinear (PT) option uses special Quantum3D-developed
hardware functionality that enables rendering 2 pixels per clock rather than just one, while still
performing trilinear texture blending. Without Performance Trilinear, you would have to
choose between 2 pixels per clock operation and trilinear mipmapping. Using Performance
Trilinear will automatically force the maximum color depth to be 22 bits per pixel, but will
increase your fill rate. Applications that require the maximum fill rate should use this feature.

"On previous AAlchemy systems, enabling trilinear filtering forced the 3dfx VSA-100
chips on board into a single-pixel-per-clock mode of operation. By modifying the
Parallel Rendering Architecture FPGA and driver software in these new AAlchemy
models, we've enabled the 3dfx VSA-100 chips to provide trilinear filtering while
concurrently operating in a two-pixel-per-clock or 'Performance Trilinear' mode,"
stated Ross Q. Smith, Founder and VP of Sales & Marketing at Quantum3D. "With
Performance Trilinear, we've effectively doubled the fill rate performance on these
new models. AAlchemy was already the performance and price/performance leader
in the industry—now we've opened the gap between the competition and us even
further."

http://www.quantum3d.com/press/pdf/archive/pr_11-27-00-2x.pdf

The AA5™ family of advanced realtime 3D graphics subsystems is available exclusively for deployment in the Quantum3D® AAlchemy™ family of scaleable, open architecture PC-based Image Generators (PC-IGs). AA5 subsystems feature Quantum3D's Parallel Rendering Architecture that combines the power of 8 or 16 3dfx VSA-100 graphics chips. The AA5 supports Quantum3D's unique Performance Trilinear™ technology which enables 2-pixel per clock trilinear rendering, 0, 2, 4 and 8-way Scan Line Interleaving (SLI) and 4 or 8-sample T-buffer™ full scene anti-aliasing to enable vis-sim integrators to "fine tune" the PC-IG for desired performance and image quality levels.

Daniel

[Ragnarok72]

Originally posted by del42sa


I think Quantum 3D used this idea in AAlchemy, they calling it "Performance Trilinear"

The Enable Performance Trilinear (PT) option uses special Quantum3D-developed
hardware functionality that enables rendering 2 pixels per clock rather than just one, while still
performing trilinear texture blending. Without Performance Trilinear, you would have to
choose between 2 pixels per clock operation and trilinear mipmapping. Using Performance
Trilinear will automatically force the maximum color depth to be 22 bits per pixel, but will
increase your fill rate. Applications that require the maximum fill rate should use this feature.

"On previous AAlchemy systems, enabling trilinear filtering forced the 3dfx VSA-100
chips on board into a single-pixel-per-clock mode of operation. By modifying the
Parallel Rendering Architecture FPGA and driver software in these new AAlchemy
models, we've enabled the 3dfx VSA-100 chips to provide trilinear filtering while
concurrently operating in a two-pixel-per-clock or 'Performance Trilinear' mode,"
stated Ross Q. Smith, Founder and VP of Sales & Marketing at Quantum3D. "With
Performance Trilinear, we've effectively doubled the fill rate performance on these
new models. AAlchemy was already the performance and price/performance leader
in the industry—now we've opened the gap between the competition and us even
further."

http://www.quantum3d.com/press/pdf/archive/pr_11-27-00-2x.pdf

The AA5™ family of advanced realtime 3D graphics subsystems is available exclusively for deployment in the Quantum3D® AAlchemy™ family of scaleable, open architecture PC-based Image Generators (PC-IGs). AA5 subsystems feature Quantum3D's Parallel Rendering Architecture that combines the power of 8 or 16 3dfx VSA-100 graphics chips. The AA5 supports Quantum3D's unique Performance Trilinear™ technology which enables 2-pixel per clock trilinear rendering, 0, 2, 4 and 8-way Scan Line Interleaving (SLI) and 4 or 8-sample T-buffer™ full scene anti-aliasing to enable vis-sim integrators to "fine tune" the PC-IG for desired performance and image quality levels.

Hmm....they very well may have.  Not to mention, if they are still only maxing out at 8x FSAA mode when they are using 8 or 16 chips, then it sounds like those extra 4 or 8 chips are probably only there so that their TMUs can be hijacked while the other chips are running in SLI....

[del42sa]

Originally posted by Ragnarok72

Originally posted by del42sa


I think Quantum 3D used this idea in AAlchemy, they calling it "Performance Trilinear"

The Enable Performance Trilinear (PT) option uses special Quantum3D-developed
hardware functionality that enables rendering 2 pixels per clock rather than just one, while still
performing trilinear texture blending. Without Performance Trilinear, you would have to
choose between 2 pixels per clock operation and trilinear mipmapping. Using Performance
Trilinear will automatically force the maximum color depth to be 22 bits per pixel, but will
increase your fill rate. Applications that require the maximum fill rate should use this feature.

"On previous AAlchemy systems, enabling trilinear filtering forced the 3dfx VSA-100
chips on board into a single-pixel-per-clock mode of operation. By modifying the
Parallel Rendering Architecture FPGA and driver software in these new AAlchemy
models, we've enabled the 3dfx VSA-100 chips to provide trilinear filtering while
concurrently operating in a two-pixel-per-clock or 'Performance Trilinear' mode,"
stated Ross Q. Smith, Founder and VP of Sales & Marketing at Quantum3D. "With
Performance Trilinear, we've effectively doubled the fill rate performance on these
new models. AAlchemy was already the performance and price/performance leader
in the industry—now we've opened the gap between the competition and us even
further."

http://www.quantum3d.com/press/pdf/archive/pr_11-27-00-2x.pdf

The AA5™ family of advanced realtime 3D graphics subsystems is available exclusively for deployment in the Quantum3D® AAlchemy™ family of scaleable, open architecture PC-based Image Generators (PC-IGs). AA5 subsystems feature Quantum3D's Parallel Rendering Architecture that combines the power of 8 or 16 3dfx VSA-100 graphics chips. The AA5 supports Quantum3D's unique Performance Trilinear™ technology which enables 2-pixel per clock trilinear rendering, 0, 2, 4 and 8-way Scan Line Interleaving (SLI) and 4 or 8-sample T-buffer™ full scene anti-aliasing to enable vis-sim integrators to "fine tune" the PC-IG for desired performance and image quality levels.

Hmm....they very well may have.  Not to mention, if they are still only maxing out at 8x FSAA mode when they are using 8 or 16 chips, then it sounds like those extra 4 or 8 chips are probably only there so that their TMUs can be hijacked while the other chips are running in SLI....

I think, it is not problem for them to use higher sample antialiasing, but I guess beyond 8x FSAA the difference isn´t so big, but the performance penalty is heavy.

I am not sure, how they enabled two pixel per clock, while they still doing trilinear texture filtering at the same time, but I guess they must use other TMU´s from second board by their Parallel Rendering Architecture FPGA and driver software moddification or it must be another trick. Notice they saying it will automatically force the maximum color depth to be 22 bits per pixel(post filter), but will
increase your fill rate.........

you should ask ross smith from Quantum3D, mail him a feel free to ask him : rsmith@Quantum3D.com


Dan

[nSomniac]

I'll give hank $200 towards it ...